In this research using the AES encryption in a JOP, we found that implementing a masked cache did not yield a statistical increase in security while implementing a masked RAM did have a measureable difference in security. The masked RAM with a 95% confidence interval showed that the increase in security (as shown by the number of traces required to find the correct key) was between 31% to 87%. This increase in security as compared to the same method applied to the cache with no increase is due largely to the fact that the RAM uses greater power than the registers and cache and leaks more information. Thus protecting this portion of the JOP has a greater effect than the protected cache did. However, masking RAM incurs a significant penalty in performance and requires additional RAM blocks to implement.
The lack of security increase for the protected cache was that the on-chip registers were not protected and leaked as much information as the cache did, thus the increase in security due to the protected cache was negligible. To correct this problem, the underlying data structure of the JOP would need to be changed. Currently the JOP employs a Von Neumann architecture where both the instructions and the data are both saved in the same memory. If the JOP structure was instead changed to a Harvard Architecture, where the instructions and data are saved in two different locations, it would be possible to split the data values and save them split in the double RAM, and keep them split as they move through the JOP all the way to the execute phase of the CPU when they would be “reassembled” as they’re being used for calculations. This is not currently feasible in the JOP because when a value is read from the RAM, instructions and data are indistinguishable and obfuscating instructions would require significant changes to the decoding stage. Changing the underlying architecture could reasonably increase the protection of the JOP several orders of magnitude, making the JOP 100 or 1000 times more secure.